One important trend of integrated circuit technology is scaling down of metal-oxide-semiconductor field effect transistors (MOSFETs) for achieving a higher integration level and a lower manufacturing cost. However, it is well known that the reduction of MOSFET sizes will incur short channel effects.
It is well known that a thickness of a depletion layer may be reduced by a super-steep retrograde well (SSRW), which in turn suppresses the short channel effects. The super-steep retrograde well is an ion implanted region which is located at a depth beneath a surface of a semiconductor layer in which a semiconductor device is formed.
The super-steep retrograde well is usually formed before a gate electrode and source/drain regions are formed. However, the super-steep retrograde well also exists in the source/drain regions, in addition to in the channel region. Dopants in the super-steep retrograde well may vary a doping type and/or a doping concentration of the source/drain regions. Consequently, it is difficult to obtain a thinned depletion layer. It is thus difficult to obtain a steeper abrupt junction. The super-steep retrograde well may have an unfavorable effect of suppressing the short channel effects.